By the end of 2026, Chinese memory manufacturer CXMT aims to ship a new generation of DDR5 registered memory modules, and the designs rest on its 4F-squared DRAM architecture.
Cao Kanyu, the company’s president, laid out the technology on October 10 at an industry conference. Server memory is the first application slated for the new design. Compared with the 6F-squared architecture that dominates the industry, the 4F-squared cell takes up less area, which raises storage density. The design pairs vertical surrounding-gate transistors with hybrid bonding, a technique that lets the memory cells and the logic around them be tuned separately.
Patent families linked to the architecture number over 300, according to the company.
The planned part widens CXMT’s server-memory push, a market whose buyers insist on dependable continuous operation. Consumer electronics once absorbed most of the company’s attention, but it has said that contributions from its server business grew during the first half of 2026.
Memory has long been among the most concentrated parts of the chip industry, so a credible Chinese supplier shifts both pricing and procurement risk. The open question is execution: pushing a fresh cell architecture into volume production on time is precisely where earlier challengers stumbled.
